I (Arman Roohi) am an associate professor in the Department of Electrical and Computer Engineering at the University of Illinois, Chicago, Chicago, IL, USA, where I am the director of the Intelligent Device-2–Applications (IDEA) Laboratory. Before joining UIC, I was an assistant professor at the University of Nebraska-Lincoln (2020-2024) and a postdoctoral research fellow at the University of Texas at Austin (2019-2020). I received my Ph.D. in Computer Engineering at the University of Central Florida, Orlando, FL, USA, in 2019. I am also a director of the Intelligent Device-2–Applications (iDEA) Lab. My group research interests span the areas of design and implementation of cross-layer (device/ circuit/ architecture) co-design for implementing complex machine learning tasks and secure computation, including hardware security and the security of artificial intelligence, which has led to over 100 publications.  

News

• [Nov 2024]: I am invited to serve as a TPC member for the EDGE AI Research Symposium 2025.
• [Oct 2024]: I have been invited to serve as a Panelist at the Workshop on AI integration with Renewable Energy harvesting sources (WAIRE) at IEEE BSN.
• [Sep 2024]: Our paper “SRC: Sustainable Reactive Computing for Battery-free Edge Intelligence” is accepted to IGSC 2024.
• [July 2024]: Our paper “ViTSen: Bridging Vision Transformers and Edge Computing with Advanced In/Near-Sensor Processing” is accepted to IEEE ESL.
• [May 2024]: Our paper “DECO: Dynamic Energy-Aware Compression and Optimization for In-Memory Neural Networks” is accepted to MWSCAS 2024.
• [May 2024]: Four papers have been accepted to ISVLSI 2024.” Congratulations all!
• [May 24]: I am invited to serve as a TPC member for ICCD 2024.
• [April 24]: I am invited to serve as a TPC member for ICONS 2024.

• [April 24]: I am invited to serve as a TPC member for ICCAD 2024.

• [April 2024]: Our paper “RACSen: Residue Arithmetic and Chaotic Processing in Sensors to Enhance CMOS Imager Security” is accepted to GLSVLSI 2024.

• [Feb 2024]: Our paper “Intermittent-Aware Design Exploration of Systolic Array Using Various Non-Volatile Memory: A Comparative Study” is accepted to Micromachines Journal.

• My NSF CAREER “Elastic Intermittent Computation Enabling Batteryless Edge Intelligence” is funded by NSF (abstract). Thanks, NSF, for the generous support!
• [Feb 2024]: Two papers have been accepted to DAC 2024. 
• [Feb 2024]: Our paper “Enabling Normally-off In-Situ Computing with a Magneto-Electric FET-based SRAM Design” is accepted to IEEE TED.
• [Feb 2024]: I am invited to serve as a TPC member for GLSVLSI 2024.
• [Feb 2024]: I am invited to serve as a track chair for ISVLSI 2024.
• [Jan 2024]: I am invited to serve as a TPC member for ISLPED 2024.
• [Dec 2023]: I am invited to serve as a TPC member for ICMI 2024.
• [Nov 2023]: Three papers have been accepted to DATE 2024. 
• [Oct 2023]: I am invited to serve as a TPC member for tinyML Research Symposium 2024.
• [Oct 2023]: Our paper “Deep Mapper: A Multi-Channel Single-Cycle Near-Sensor DNN Accelerator” is accepted to IEEE ICRC.
• [Oct 2023]: I am invited to serve as a TPC member for DAC 2024.
• Our project proposal entitled “CSR: Small: Cross-Layer Solutions Enabling Instant Computing for Edge Intelligence Devices” is funded by NSF (abstract). Thanks, NSF, for the generous support!
• [Sep 2023]: I am invited to serve as a TPC member for SVCC 2024.
• [Sep. 2023]: Our paper “EnCoDe: Enhancing Compressed Deep Learning Models through Feature Distillation and Informative Sample Selection” is accepted to IEEE ICMLA.
• [August 2023]: I am invited to serve as a TPC member for ISQED 2024.
• [August 2023]: I am invited to serve as a TPC member for ICMLA 2024.
• [August 2023]: Our paper “PiPSim: A Behavior-Level Modeling Tool for CNN Processing-in-Pixel Accelerators” is accepted to IEEE TCAD.
• [July 2023]: I am invited to give a talk at the Solid-State Circuits Society (SSCS) Open Journal Webinar Series. 
•  Our collaborative project proposal entitled “SaTC: CORE: Medium: Security and Robustness for Intermittent Computing Using Cross-Layer Post-CMOS Approaches” is funded by NSF (abstract). Thanks, NSF, for the generous support!
• [July 2023]: I am invited to give a talk at the Solid-State Circuits Society (SSCS) Open Journal Webinar Series. 
• [July 2023]: I am invited to serve as a TPC member for ISQED 2024.
• [July 2023]: Our paper “Design and Evaluation of a Near-Sensor Magneto-Electric FET-based Event Detector” is accepted to IEEE TED.
• [July 2023]: Our paper “Ocellus: Highly Parallel Convolution-in-Pixel Scheme Realizing Power-Delay-Efficient Edge Intelligence” has been selected as the Best Paper Candidate in ISLPED 2023.
• [July 2023]: Our paper “PISA: A Non-Volatile Processing-In-Sensor Accelerator for Imaging Systems” is accepted to IEEE TETC 2023.
• [June 2023]: I am invited to serve as a TPC member for ICCD 2023.
• [June 2023]: Our paper “Near-Sensor Processing Accelerator for Approximate Local Binary Pattern Networks” is accepted to IEEE TETC 2023.
• [June 2023]: Our paper “Comparative Study of Low Bit-width DNN Accelerators: Opportunities and Challenges” is accepted to MWSCAS 2023.
• [May 2023]: Our paper “Ocellus: Highly Parallel Convolution-in-Pixel Scheme Realizing Power-Delay-Efficient Edge Intelligence” is accepted to ISLPED 2023.
• [May 2023]: I am invited to give a talk at the Multicore and Multiprocessor SoCs (MPSoC) 2023.
• [Mar 2023]: I am the recipient of the Outstanding Teaching Award – Graduate Level, School of Computing, University of Nebraska-Lincoln, 2022-2023.
• [Mar 2023]: Our paper “SenTer: A Reconfigurable Processing-in-Sensor Architecture Enabling Efficient Ternary MLP” is accepted to GLSVLSI 2023.
• [Mar 2023]: I am invited to serve as a TPC member for NOCS 2023.
• [Feb 2023]: I am invited to serve as a Track Chair for ISVLSI 2023.
• [Feb 2023]: Our paper “AppCiP: Energy-Efficient Approximate Convolution-in-Pixel Scheme for Neural Network Acceleration” is accepted to IEEE JETCAS.
• [Jan 2023]: Our paper “XOR-CiM: An Efficient Computing-in-SOT-MRAM Design for Binary Neural Network Acceleration” is accepted to ISQED 2023.
• [Jan 2023]: I am invited to serve as a session chair for the tinyML Research Symposium 2023.
• [Jan 2023]: I am invited to serve as a TPC member for GLSVLSI 2023.
• [Jan 2023]: I am invited to serve as a TPC member for ISLPED 2023.
• [Jan 2023]: Our paper “NeSe: Near-Sensor Event-Driven Scheme for Low Power Energy Harvesting Sensors” is accepted to ISCAS 2023.
• [Dec 2022]: I am invited to serve as a TPC member for the tinyML Research Symposium 2023.
• [Nov 2022]: Our paper “P-PIM: A Parallel Processing-in-DRAM Framework Enabling RowHammer Protection” is accepted to DATE 2023. 
• [Nov 2022]: Our paper “LT-PIM: An LUT-based Processing-in-DRAM Architecture with RowHammer Self-Tracking” is accepted to IEEE Computer Architecture Letters (CAL). 
• [Oct 2022]: Our paper “Ocelli: Efficient Processing-in-Pixel Array Enabling Edge Inference of Ternary Neural Networks” is accepted to Journal of Low Power Electronics and Applications.
• [Oct 2022]: Our paper “HARDeNN: Hardware-assisted Attack-resilient Deep Neural Network Architectures” is accepted to Microprocessors & Microsystems.
• [Sep 2022]: Our paper “MR-PIPA: An Integrated Multi-level RRAM (HfOx) based Processing-In-Pixel Accelerator” is accepted to IEEE JXCDC.
• Our collaborative project proposal entitled “Integrated Sensing and Normally-off Computing for Edge Imaging Systems” is funded by NSF (abstract). Thanks, NSF, for the generous support!
• [Sep 2022]: Our paper “semiMul: Floating-Point Free Implementations for Efficient and Accurate Neural Network Training” is accepted to ICMLA 2022.
• [Aug 2022]: Our paper “TizBin: A Low-Power Image Sensor with Event and Object Detection Using Efficient Processing-in-Pixel Schemes” is accepted to ICCD 2022.
• [Aug 2022]: I am invited to serve as a TPC member for ISQED 2023.
• [Aug 2022]: Our paper “Enabling Intelligent IoTs for Histopathology Image Analysis Using Convolutional Neural Networks” is accepted to Micromachines.
• [July 2022]: I am invited to serve as a Track Chair for VLSID 2023.
• [July 2022]: Our paper “ReD-LUT: Reconfigurable In-DRAM LUTs Enabling Massive Parallel Computation” is accepted to ICCAD 2022.
• [July 2022]: Our paper “A Processing-in-Pixel Accelerator based on Multi-level HfOx ReRAM” is accepted to ESWEEK CASES 2022.
• [June 2022]: I am invited to serve as a TPC member for NOCS 2022.
• [May 2022]: Our paper “FlexiDRAM: A Flexible in-DRAM Framework to Enable Parallel General-Purpose Computation” is accepted to ISLPED 2022.
• [May 2022]: Our paper “Design and Evaluation of a Robust Power-Efficient Ternary SRAM Cell” is accepted to MWSCAS 2022.
• [May 2022]: Our paper “EaseMiss: HW/SW Co-Optimization for Efficient Large Matrix-Matrix Multiply Operations” is accepted to DCAS 2022.
• [Apr 2022]: I am invited to serve as a TPC member for ICCD 2022.
• [Mar 2022]: I am invited to serve as a TPC member for ISVLSI 2022.
• [Mar 2022]: Our paper “Enabling Efficient Training of Convolutional Neural Networks for Histopathology Images” is accepted to DHW 2022.
• [Mar 2022]: I am invited to serve as a TPC member for MWSCAS 2022.
• [Feb 2022]: Our paper “Efficient Targeted Bit-Flip Attack Against the Local Binary Pattern Network” is accepted to HOST 2022.

• [Jan 2022]: Our paper “SCiMA: a Generic Single-Cycle Compute-in-Memory Acceleration Scheme for Matrix Computations” is accepted to ISCAS 2022.

• [Dec 2021]: Our paper “ReFACE: Efficient Design Methodology for Acceleration of Digital Filter Implementations” is accepted to ISQED 2022.

• [Oct 2021]: I am invited to serve as a TPC member for DAC 2022.

• [Oct 2021]: I am invited to serve as a TPC member for VLSID 2022.

• [Sep 2021]: I am invited to serve as a TPC member for ISQED 2022.

• [Aug 2021]: “Neuromorphic Computing: From Material to Algorithm (NeuMA)” workshop program at IEEE IGSC 2021 is now finalized.

• [July 2021]: Our paper “RNSiM: Efficient Deep Neural Network Accelerator Using Residue Number Systems” is accepted to the 40th International Conference On Computer Aided Design (ICCAD), 2021.
• I am invited to serve as a chair for the special session of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2021.
• I will be serving as the Special Issue Editor for the Micromachines Journal, “Hardware – Friendly Machine Learning and its Applications.”
• I am invited to serve as a chair for the poster session of the ACM Great Lakes Symposium on VLSI (GLSVLSI), 2021.
• I am invited to serve in the TPC of IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2021.
• I am invited to serve in the TPC of Silicon Valley Cybersecurity Conference (SVCC), 2021.
• [April 2021]: Our paper “Processing-in-Memory Acceleration of MAC-based Applications Using Residue Number System: A Comparative Study” is accepted to Proceedings of 2021 on Great Lakes Symposium on VLSI.